Generally, wireless communication equipment such as a radio receiver is provided with an AGC (automatic gain control) circuit for adjusting a gain of a received signal. An RF (radio frequency) AGC circuit adjusts an amplification gain of an RF signal received at an antenna to keep the level of the received signal constant.
FIG. 1 is a view showing a configuration of a conventional automatic gain control circuit. In FIG. 1, a first MOS transistor M1 and a second MOS transistor M2 constitute a cascode amplifier. Since basically making no feedback from an output to an input, the cascode amplifier is in frequent used as a high frequency amplifier (e.g. LNA: low noise amplifier).
Specifically, the cascode amplifier is configured as follows. A source of the first MOS transistor M1 is grounded, and a drain thereof is connected with a source of the second MOS transistor M2. A drain of the second MOS transistor M2 is connected with an output terminal OUT via a load Z. The gate of the first MOS transistor M1 is supplied with an antenna input signal from an input terminal IN, and the gate of the second MOS transistor M2 is supplied with an AGC control voltage VAGC.
The third MOS transistor M3 is current-mirror connected to the first MOS transistor M1. Namely, while the gates of the first MOS transistor M1 and the third MOS transistor M3 are connected in common via a resistance R1, sources thereof are grounded. Further, the gate of the third MOS transistor M3 is connected to a drain thereof itself, and the drain is connected with a constant current circuit I.
Next, the operation of the conventional automatic gain control circuit configured as in FIG. 1 is described. An antenna input signal (received signal) inputted from the input terminal IN is amplified by the cascode amplifier comprised of the first MOS transistor M1 and the second MOS transistor M2, and thereafter, outputted from the output terminal OUT through the load Z connected to the drain of the second MOS transistor M2.
The operation of the AGC is realized by controlling the AGC control voltage VAGC which is inputted into the gate of the second MOS transistor M2. For example, when an interference wave is detected from a received signal and thus a gain of the automatic gain control circuit needs to be attenuated, the AGC control voltage VAGC which is inputted into the gate of the second MOS transistor M2 is decreased, to realize the attenuation of the gain.
However, in the conventional automatic gain control circuit shown in above FIG. 1, since the relation between a gate voltage and a drain current in the MOS transistor is originally not linear, an AGC control characteristic as shown in FIG. 2 is obtained. As seen from this FIG. 2, especially in a region where the AGC control voltage VAGC is smaller than 1 V, a gain not larger than 20 dB is greatly changes, and a change in gain with respect to a change in AGC control voltage VAGC becomes critical. A gain control sensitivity thereby becomes too high in this region, which causes a problem of making minute gain control difficult.
Namely, when a cascode amplifier is to be gain controlled, a method of applying the AGC control voltage VAGC to the gate of the gate grounded second MOS transistor M2 to perform gain control is generally adopted. In this case, when the AGC control voltage VAGC is small, a drain-source voltage Vds in the source grounded first MOS transistor M1 becomes small, and thereby the first MOS transistor M1 is operated in a nonsaturated region. Therefore, mutual conductance gm of the first MOS transistor M1 is changed to perform gain control. However, since the mutual conductance gm is proportional to the drain-source voltage Vds in the nonsaturated region, a gain expressed in decibels abruptly changes with respect to the AGC control voltage VAGC.
Moreover, since the first MOS transistor M1 operates in the nonsaturated region when the AGC control voltage VAGC is small, an ON resistance of the first MOS transistor M1 is modulated by an input signal, and distortion thus occurs. Hence there has been a problem in that, when an input signal is phase modulated, it appears as noise.
In addition, there is provided a technique of providing a bias circuit A1 which converts an inputted control voltage Vc′ into Vc to obtain a linear relation between the control voltage Vc′ and a decibel gain (e.g. see Patent Document 1). Specifically, a gate width of an electric field effect transistor provided in the bias circuit A1 is selected so as to obtain the linear relation between the control voltage Vc′ and the decibel gain.
Patent Document 1: Japanese Patent Laid-Open No. 2002-141758